High Defect Coverage with Low Power Test Sequences in a BIST Environment - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Journal Articles IEEE Design & Test Year : 2002

High Defect Coverage with Low Power Test Sequences in a BIST Environment

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Micro and nanotechnologies/Microelectronics

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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00268585

Submitted on : Tuesday, April 1, 2008-9:27:54 AM

Last modification on : Friday, March 24, 2023-2:52:50 PM

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lirmm-00268585 , version 1 (01-04-2008)

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Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Hans-Joachim Wunderlich. High Defect Coverage with Low Power Test Sequences in a BIST Environment. IEEE Design & Test, 2002, 19 (5), pp.44-52. ⟨10.1109/MDT.2002.1033791⟩. ⟨lirmm-00268585⟩

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