In Situ Design of Register Operations

Emeric Gioan 1 Serge Burckel 2
1 ALGCO - Algorithmes, Graphes et Combinatoire
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 CASSIS - Combination of approaches to the security of infinite states systems
FEMTO-ST - Franche-Comté Électronique Mécanique, Thermique et Optique - Sciences et Technologies, INRIA Lorraine, LORIA - Laboratoire Lorrain de Recherche en Informatique et ses Applications
Abstract : We present methods to design programs or electronic circuits, for performing any operation on K registers of any sizes in a processor, in such a way that one uses no other working memory (such as other registers or external memories). In this way, any operation is performed with at most 4K-3 assignments of these registers, or 2K-1 when the operation is linear or bijective.
Type de document :
Communication dans un congrès
ISVLSI'08: IEEE Computer Society Annual Symposium on Very-Large-Scale Integration, Apr 2008, Montpellier, France, IEEE Computer Society, Trends in VLSI Technology and Design, pp.4, 2008, 〈http://www.lirmm.fr/isvlsi2008/〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00287659
Contributeur : Emeric Gioan <>
Soumis le : jeudi 12 juin 2008 - 14:24:45
Dernière modification le : jeudi 15 février 2018 - 08:48:09

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  • HAL Id : lirmm-00287659, version 1

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Emeric Gioan, Serge Burckel. In Situ Design of Register Operations. ISVLSI'08: IEEE Computer Society Annual Symposium on Very-Large-Scale Integration, Apr 2008, Montpellier, France, IEEE Computer Society, Trends in VLSI Technology and Design, pp.4, 2008, 〈http://www.lirmm.fr/isvlsi2008/〉. 〈lirmm-00287659〉

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