SoC Yield Improvement: Redundant Architectures to the Rescue

Abstract : Manufacturing processes in the nanoscale era are less and less reliable thus leading to lower and lower yield. In this paper we investigate the usage of TMR architectures for logic cores to increase SoC yield.
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Poster
ITC'2008: International Test Conference, Oct 2008, Santa Clara, CA, United States. IEEE, pp.7, 2008
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00341799
Contributeur : Arnaud Virazel <>
Soumis le : mercredi 26 novembre 2008 - 09:34:34
Dernière modification le : jeudi 24 mai 2018 - 15:59:24

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  • HAL Id : lirmm-00341799, version 1

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Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, et al.. SoC Yield Improvement: Redundant Architectures to the Rescue. ITC'2008: International Test Conference, Oct 2008, Santa Clara, CA, United States. IEEE, pp.7, 2008. 〈lirmm-00341799〉

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