Skip to Main content Skip to Navigation
Conference papers

Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the aPACHES' Platform

Abstract : The increasing number of cores used on a single die in response to the power-computing applications tends to orient SoCs more and more toward communication-centric concept. Networks-on-chip (NoC) are good candidates providing both parallelism and flexibility. Nevertheless they imply to consider the notion of locality when distributing the computation among a set of cores. Defining an optimal placement at compile-time is difficult since other applications may temporarily make use of some of the processing resources. This paper explores the opportunity of dynamically mapping task graphs through using different placement algorithms, experiments and comparisons are conducted on a homogeneous coarse-grain reconfigurable architecture running JPEG applications. Results show that run-time task mapping is possible and brings interesting benefits over a random or static placement, especially when contention effects stemming from the communication medium are taken into account.
Complete list of metadatas

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00352790
Contributor : Christine Carvalho de Matos <>
Submitted on : Tuesday, January 13, 2009 - 5:39:36 PM
Last modification on : Saturday, February 2, 2019 - 10:08:48 AM

Links full text

Identifiers

Collections

Citation

Alex Ngouanga, Gilles Sassatelli, Lionel Torres, Thierry Gil, André Borin Soares, et al.. Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the aPACHES' Platform. ARC: Applied Reconfigurable Computing, Mar 2006, Delft, Netherlands. pp.134-145, ⟨10.1007/11802839_19⟩. ⟨lirmm-00352790⟩

Share

Metrics

Record views

161