Evaluation on FPGA of Triple Rail Logic Robustness Against DPA and DEMA

Abstract : Side channel attacks are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of triple rail logic against power and electromagnetic analyses on FPGA devices. More precisely, it aims at demonstrating that the basic concepts behind triple rail logic are valid and may provide interesting design guidelines to get DPA resistant circuits which are also more robust against DEMA.
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Communication dans un congrès
DATE: Design, Automation and Test in Europe, 2009, Nice, France. pp.634-639, 2009, 〈10.1109/DATE.2009.5090744〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00372847
Contributeur : Martine Peridier <>
Soumis le : jeudi 2 avril 2009 - 15:36:59
Dernière modification le : jeudi 11 janvier 2018 - 06:27:19

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Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, et al.. Evaluation on FPGA of Triple Rail Logic Robustness Against DPA and DEMA. DATE: Design, Automation and Test in Europe, 2009, Nice, France. pp.634-639, 2009, 〈10.1109/DATE.2009.5090744〉. 〈lirmm-00372847〉

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