Evaluation on FPGA of Triple Rail Logic Robustness Against DPA and DEMA - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2009

Evaluation on FPGA of Triple Rail Logic Robustness Against DPA and DEMA

Abstract

Side channel attacks are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of triple rail logic against power and electromagnetic analyses on FPGA devices. More precisely, it aims at demonstrating that the basic concepts behind triple rail logic are valid and may provide interesting design guidelines to get DPA resistant circuits which are also more robust against DEMA.

Dates and versions

lirmm-00372847 , version 1 (02-04-2009)

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Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, et al.. Evaluation on FPGA of Triple Rail Logic Robustness Against DPA and DEMA. DATE: Design, Automation and Test in Europe, 2009, Nice, France. pp.634-639, ⟨10.1109/DATE.2009.5090744⟩. ⟨lirmm-00372847⟩
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