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Conference papers

Prototyping Secure Triple Track Logic (STTL) Robustness Against DPA & DEMA on FPGA

Victor Lomné 1 Rafael Soares 2 Thomas Ordas 1 Philippe Maurine 3 Lionel Torres 3 Michel Robert 3
1 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 PUCRS - Pontifícia Universidade Católica do Rio Grande do Sul [Porto Alegre]
3 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
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Conference papers
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00373539
Contributor : Victor Lomne Connect in order to contact the contributor
Submitted on : Monday, April 6, 2009 - 1:19:51 PM
Last modification on : Tuesday, March 15, 2022 - 12:55:40 PM

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  • HAL Id : lirmm-00373539, version 1

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER | AXESECULIRMM

Citation

Victor Lomné, Rafael Soares, Thomas Ordas, Philippe Maurine, Lionel Torres, et al.. Prototyping Secure Triple Track Logic (STTL) Robustness Against DPA & DEMA on FPGA. CryptArchi: Cryptographic Architectures, Jun 2008, Tregastel, France. ⟨lirmm-00373539⟩

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