On-Chip Process Variability Monitoring
Abstract
The management of the process induced variability, which is a matter of a few atoms or less, while warranting integrated circuit's functionality is now one of the major challenges in integrated system design. The fluctuation of key process parameters such as gate length, oxide thickness, threshold voltage, in addition to the variability related to local transistor environment and wires including circuit layout, pattern dependency and density appears as an important additional issue and technological solutions can no longer compensate for all the effects of scaling. Up to now, this increasing variability has led designers to introduce additional design margins which increases pessimism and thus reduces both timing and power performances. Within this context, to overcome the variability issue, good process control techniques combined with on-chip performance monitoring and compensation techniques appears as an interesting solution. This poster will present the integration of on-chip process sensors to ease the tracking over fab-to-fab, wafer-to-wafer and die-to-die variability, and also ease the implementation of diagnosis methodologies and process learning which resumes in closing the loop between system design and technology development