Skip to Main content Skip to Navigation
Conference papers

Electrical Analysis of a Domino Logic Cell with GOS Faults

Abstract : Gate-Oxide Shorts (GOS) have an increasing impact on the integrated circuit production yield due to the reduction of the related dimensions. The detection of GOS is a challenging issue in the field of testing. This paper presents a detailed study of the impact of a GOS fault affecting a Domino logic circuit. Indeed, Domino logic specific clocked operating principle induces a different behavior from standard full CMOS cells under the effect of a GOS, which can enable GOS detection. Finally, some clues to enhance GOS detection in Domino cells are proposed.
Complete list of metadatas

Cited literature [12 references]  Display  Hide  Download

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00374937
Contributor : Mariane Comte <>
Submitted on : Friday, April 10, 2009 - 1:09:01 PM
Last modification on : Friday, July 20, 2018 - 12:34:01 PM
Long-term archiving on: : Thursday, June 10, 2010 - 8:18:42 PM

File

DBT05_final.pdf
Files produced by the author(s)

Identifiers

  • HAL Id : lirmm-00374937, version 1

Collections

Citation

Mariane Comte, Satoshi Ohtake, Hideo Fujiwara, Michel Renovell. Electrical Analysis of a Domino Logic Cell with GOS Faults. DBT'05: International Workshop on Current & Defect Based Testing, May 2005, Palm Springs, CA, United States. ⟨lirmm-00374937⟩

Share

Metrics

Record views

411

Files downloads

215