Automatic Test Pattern Generation for Resistive Bridging Faults - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Journal Articles Journal of Electronic Testing: : Theory and Applications Year : 2006

Automatic Test Pattern Generation for Resistive Bridging Faults

Piet Engelke
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Bernd Becker
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Abstract

An ATPG for resistive bridging faults in combinational or full-scan circuits is proposed. It combines the advantages of section-based generation and interval-based simulation. In contrast to the solutions introducted so far, it can handle static effects of arbitrary non-feedback bridges between two nodes, including ones detectable at higher bridge resistance and undetectable at lower resistance, and faults requiring more than one vector for detection. The developed tool is applied to ISCAS circuits, and a higher efficiency compared with other resistive bridging faults as well as stuck-at ATPG is reported. Information required for accurate resistive bridging fault simulation is obtained as a by-product.

Dates and versions

lirmm-00375014 , version 1 (10-04-2009)

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Piet Engelke, Michel Renovell, Bernd Becker. Automatic Test Pattern Generation for Resistive Bridging Faults. Journal of Electronic Testing: : Theory and Applications, 2006, 22 (1), pp.61-69. ⟨10.1007/s10836-006-6392-x⟩. ⟨lirmm-00375014⟩
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