Gated thyristor and related system and method - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Brevet Année : 2006

Gated thyristor and related system and method

Résumé

An embodiment of a protection circuit, comprising a first PNP-type bipolar transistor and a second NPN-type bipolar transistor, the base of the first transistor being connected to the collector of the second transistor and the collector of the first transistor being connected to the base of the second transistor, in which a MOS transistor is connected between the collector and the emitter of the second transistor.
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Dates et versions

lirmm-00406923 , version 1 (23-07-2009)

Identifiants

  • HAL Id : lirmm-00406923 , version 1

Citer

Christophe Entringer, Philippe Flatresse, Pascal Salomé, Pascal Nouet, Florence Azaïs. Gated thyristor and related system and method. United States, Patent n° : FR20060052837. 2006. ⟨lirmm-00406923⟩
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