On-Chip Process Variability Monitoring

Abstract : This paper aims at presenting the benefits obtained from the implementation of the on-chip process monitoring techniques on industrial integrated systems. Among the integrated process monitoring techniques, the main one aims at reducing the supply voltage of fast circuits in order to reduce their power consumption while maintaining the specified operating frequency. The proposed process monitoring flow includes efficient methodologies to gather/sort on-chip process data but also post-silicon tuning strategies and validation methods at both design and test steps. Concrete results are introduced in this paper to demonstrate the added value of such a methodology. More precisely, it is shown that its application leads to an overall energy reduction ranging from 10% to 20% on fast chips.
Type de document :
Communication dans un congrès
VARI: Workshop on CMOS Variability, May 2010, Montpellier, France. 2010, 1st European Workshop on CMOS Variability
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00546337
Contributeur : Nadine Azemard <>
Soumis le : mardi 14 décembre 2010 - 10:50:50
Dernière modification le : mercredi 24 octobre 2018 - 09:02:05

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  • HAL Id : lirmm-00546337, version 1

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Nabila Moubdi, Philippe Maurine, Robin Wilson, Nadine Azemard, Vincent Dumettier, et al.. On-Chip Process Variability Monitoring. VARI: Workshop on CMOS Variability, May 2010, Montpellier, France. 2010, 1st European Workshop on CMOS Variability. 〈lirmm-00546337〉

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