Why and How Controlling Power Consumption During Test: A Survey

Alberto Bosio 1 Luigi Dilillo 1 Patrick Girard 1 Aida Todri-Sanial 1 Arnaud Virazel 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Managing the power consumption of circuits and systems is challenging not only during functional operations but also during manufacturing test. In this paper, we first explain why it is important to control power consumption during test application. We will introduce the basic concepts and discuss issues arising from excessive power dissipation during test. Then, we explain how it is possible to control power consumption during test. We will provide an overview of existing structural and algorithmic solutions for power-aware testing, and we will show how low power circuits can be tested safely without affecting yield and reliability.
Type de document :
Communication dans un congrès
ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. Test Symposium (ATS), 2012 IEEE 21st Asian, pp. 221-226, 2012, 〈http://aries3a.cse.kyutech.ac.jp/~ats12/〉. 〈10.1109/ATS.2012.30〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00818984
Contributeur : Luigi Dilillo <>
Soumis le : lundi 29 avril 2013 - 17:17:47
Dernière modification le : mardi 4 septembre 2018 - 15:00:01

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Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Arnaud Virazel. Why and How Controlling Power Consumption During Test: A Survey. ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. Test Symposium (ATS), 2012 IEEE 21st Asian, pp. 221-226, 2012, 〈http://aries3a.cse.kyutech.ac.jp/~ats12/〉. 〈10.1109/ATS.2012.30〉. 〈lirmm-00818984〉

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