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Cellule mémoire avec mémorisation volatile et non volatile

Abstract : The invention concerns a memory device comprising at least one memory cell comprising: first and second pairs of cross-coupled transistors; and a first resistance switching element (202) coupled between a first supply voltage (VDD, GND) and a first transistor of said first pair of transistors and programmed to have one of first and second resistances; and control circuitry adapted to store a data value (DNV) at said first and second storage nodes by coupling said first storage node to said second supply voltage (VDD, GND), the data value being determined by the programmed resistance of the first resistance switching element.
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Contributor : Isabelle Gouat <>
Submitted on : Thursday, September 12, 2013 - 7:36:55 PM
Last modification on : Tuesday, June 26, 2018 - 1:18:32 AM


  • HAL Id : lirmm-00861518, version 1



Yoann Guillemenet, Lionel Torres. Cellule mémoire avec mémorisation volatile et non volatile. France, N° de brevet: FR 2976711 (A1) WO/2012/171988 (A1). 2012, pp.N/A. ⟨lirmm-00861518⟩



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