Testing Methods for PUF-Based Secure Key Storage Circuits

Mafalda Cortez 1 Gijs Roelofs 1 Said Hamdioui 1 Giorgio Di Natale 2
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Design for test is an integral part of any VLSI chip. However, for secure systems extra precautions have to be taken to prevent that the test circuitry could reveal secret information. This paper addresses secure test for Physical Unclonable Function based systems. It investigates two secure Built-In Self-Test (BIST) solutions for Fuzzy Extractor (FE) which is the main component of PUF-based systems. The schemes target high stuck-at-fault (SAF) coverage by performing scan-chain free functional testing, to prevent scan-chain abuse for attacks. The first scheme reuses existing FE blocks (for pattern generation and compression) to minimize the area overhead, while the second scheme tests all the FE blocks simultaneously to minimize the test time. The schemes are integrated in FE design and simulated; the results show that for the first test scheme, a SAF fault coverage of 95 % can be realized with no more than 47.1k clock cycles at the cost of a negligible area overhead of only 2.2 %; while for the second test scheme a SAF fault coverage of 95 % can be realized with 3.5k clock cycles at the cost of 18.6 % area overhead. Higher fault coverages are possible to realize at extra cost (i.e., either by extending the test time, or by adding extra hardware, or a combination of both).
Type de document :
Article dans une revue
Journal of Electronic Testing, Springer Verlag, 2014, 30 (5), pp.581-594. 〈10.1007/s10836-014-5471-7〉
Liste complète des métadonnées

https://hal-lirmm.ccsd.cnrs.fr/lirmm-01234059
Contributeur : Giorgio Di Natale <>
Soumis le : vendredi 19 février 2016 - 10:27:19
Dernière modification le : jeudi 11 janvier 2018 - 06:27:19

Identifiants

Collections

Citation

Mafalda Cortez, Gijs Roelofs, Said Hamdioui, Giorgio Di Natale. Testing Methods for PUF-Based Secure Key Storage Circuits. Journal of Electronic Testing, Springer Verlag, 2014, 30 (5), pp.581-594. 〈10.1007/s10836-014-5471-7〉. 〈lirmm-01234059〉

Partager

Métriques

Consultations de la notice

36