Asynchronous Design for Harsh Environments

Abstract : Radiation robust circuit design for harsh environments like space is a big challenge for today engineers and researchers. As circuits become more and more complex and CMOS processes get denser and smaller, their immunity towards particle strikes decreases drastically. This work has for objective to improve the SoC robustness against particle attacks targeting very advanced processes. This should be possible combining three already proven robust design techniques: Asynchronous communication, Silicon on Insulator (SOI) technologies and Spintronics (MRAM). The combination of these three techniques should give some fundamentally new architecture with higher performances than what is available today in terms of robustness but also in terms of speed, consumption and surface.
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Communication dans un congrès
ASYNC: International Symposium on Asynchronous Circuits and Systems, May 2015, Montain View, Silicon Valley, California, United States. IEEE, 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015, 〈http://ee.usc.edu/async2015/〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01250722
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Dernière modification le : vendredi 9 mars 2018 - 16:38:03
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  • HAL Id : lirmm-01250722, version 1

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Jeremy Lopes, Gregory Di Pendina, Edith Beigne, Lionel Torres. Asynchronous Design for Harsh Environments. ASYNC: International Symposium on Asynchronous Circuits and Systems, May 2015, Montain View, Silicon Valley, California, United States. IEEE, 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015, 〈http://ee.usc.edu/async2015/〉. 〈lirmm-01250722〉

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