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Conference Papers Year : 2015

On the Complexity of Wafer-to-Wafer Integration


In this paper we consider the Wafer-to-Wafer Integration problem. A wafer is a p-dimensional binary vector. The input of this problem is described by m disjoints sets (called “lots”), where each set contains n wafers. The output of the problem is a set of n disjoint stacks, where a stack is a set of m wafers (one wafer from each lot). To each stack we associate a p-dimensional binary vector corresponding to the bit-wise AND operation of the wafers of the stack. The objective is to maximize the total number of “1” in the n stacks. We provide O(m1−ϵ) and O(p1−ϵ) non-approximability results even for n=2, as well as a pr-approximation algorithm for any constant r. Finally, we show that the problem is FPT when parameterized by p, and we use this FPT algorithm to improve the running time of the pr-approximation algorithm.

Dates and versions

lirmm-01250989 , version 1 (05-01-2016)



Guillerme Duvillié, Marin Bougeret, Vincent Boudet, Trivikram Dokka, Rodolphe Giroudeau. On the Complexity of Wafer-to-Wafer Integration. CIAC: International Conference on Algorithms and Complexity, May 2015, Paris, France. pp.208-220, ⟨10.1007/978-3-319-18173-8_15⟩. ⟨lirmm-01250989⟩
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