On the limitations of logic testing for detecting Hardware Trojans Horses

Marie-Lise Flottes 1 Sophie Dupuis 1 Papa-Sidy Ba 1 Bruno Rouzeyre 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : The insertion of malicious alterations to a circuit, referred to as Hardware Trojan Horses (HTH), is a threat considered more and more seriously in the last years. Several methods have been proposed in literature to detect the presence of such alterations. Among them, logic testing approaches consist in trying to activate potential HTHs and detect erroneous outputs by exploiting manufacturing digital test techniques. Besides the complexity of this approach due to the intrinsic stealthiness of the potential HTH, we will show that a particular HTH targeting the test infrastructure itself may jeopardize the possibility of detecting any other alterations.
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Communication dans un congrès
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. IEEE, Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on, 2015, 〈10.1109/DTIS.2015.7127362〉
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Marie-Lise Flottes, Sophie Dupuis, Papa-Sidy Ba, Bruno Rouzeyre. On the limitations of logic testing for detecting Hardware Trojans Horses. DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. IEEE, Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on, 2015, 〈10.1109/DTIS.2015.7127362〉. 〈lirmm-01257837〉

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