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Journal Articles Journal of Low Power Electronics Year : 2016

Energy Study for 28 nm Fully Depleted Silicon-On-Insulator Devices

Rida Kheirallah
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Gilles R. Ducharme
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Nadine Azemard

Abstract

In this paper, we propose to study the impact of 28nm FDSOI technology on energy study. In fact, due to the effects of the Moore’s law, the process variations in current technologies are increasing and have a major impact on power and performance which results in parametric yield loss. Due to this, process variability and the difficulty of modeling accurately transistor behavior impede the dimensions scaling benefits. The Fully Depleted Silicon-On-Insulator (FDSOI) technology is one of the main contenders for deep submicron devices as they can operate at low voltage with superior energy efficiency compared with bulk CMOS. In this paper, we study the static energy on 28nm FDSOI devices to implement sub-threshold circuits. Study of delay vs. static power trade-off reveals the FDSOI robustness with respect to process variations.
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Dates and versions

lirmm-01295833 , version 1 (31-03-2016)

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Rida Kheirallah, Gilles R. Ducharme, Nadine Azemard. Energy Study for 28 nm Fully Depleted Silicon-On-Insulator Devices. Journal of Low Power Electronics, 2016, 12 (1), pp.58-63. ⟨10.1166/jolpe.2016.1420⟩. ⟨lirmm-01295833⟩
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