Hardware Trust through Layout Filling: a Hardware Trojan Prevention Technique

Papa-Sidy Ba 1 Sophie Dupuis 1 Manikandan Palanichamy 1 Marie-Lise Flottes 1 Giorgio Di Natale 1 Bruno Rouzeyre 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : The insertion of malicious alterations to a circuit, referred to as Hardware Trojans, is a threat considered more and more seriously during the last years. Numerous methods have been proposed in the literature to detect the presence of such alterations. More recently, Design-for-Hardware-Trust (DfHT) methods have been proposed, that enhance the design of the circuit in order to incorporate features that can either prevent the insertion of a HT or that can help detection methods. This paper focuses on a HT prevention technique that aims at creating a layout without filler cells, which are assumed to provide a great opportunity for HT insertion, in order to make the insertion of a HT in a layout as difficult as possible.
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Communication dans un congrès
ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2016, Pittsburgh, United States. 2016, 〈http://www.isvlsi.org〉. 〈10.1109/ISVLSI.2016.22〉
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Soumis le : mardi 19 juillet 2016 - 11:03:05
Dernière modification le : mardi 27 février 2018 - 09:26:03

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Papa-Sidy Ba, Sophie Dupuis, Manikandan Palanichamy, Marie-Lise Flottes, Giorgio Di Natale, et al.. Hardware Trust through Layout Filling: a Hardware Trojan Prevention Technique. ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2016, Pittsburgh, United States. 2016, 〈http://www.isvlsi.org〉. 〈10.1109/ISVLSI.2016.22〉. 〈lirmm-01346529〉

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