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Book Sections Year : 2016

Lumped Electro-Thermal Modeling and Analysis of Carbon Nanotube Interconnects

Abstract

Carbon nanotubes (CNTs) due to their unique electrical, thermal, and mechanical properties are being investigated as promising candidate material for on-chip and off-chip interconnects. The attractive mechanical properties of CNTs, including high Youngs modulus, resiliency, and low thermal expansion coefficient, offer great advantage for reliable and strong interconnects, and even more so for local and global on-chip interconnects. With aggressive scaling, on-chip interconnects contribute to power consumption and heat build-up due to their increasing parasitics with scaling which detriment overall energy efficiency of circuits. Due to their unique properties, CNTs present an opportunity to address these challenges and provide solutions for reliable signal and power/ground interconnects. In this chapter, we perform detailed electro-thermal analyses of horizontally aligned CNTs and report on their performance and voltage drop.
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lirmm-01445070 , version 1 (24-01-2017)

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Aida Todri-Sanial. Lumped Electro-Thermal Modeling and Analysis of Carbon Nanotube Interconnects. Saraju P. Mohanty; Ashok Srivastava. Nano-CMOS and Post-CMOS Electronics: Circuits and Design, IET, pp.201-218, 2016, Chapter 7, 978-1-84919-999-5. ⟨10.1049/PBCS030E_ch7⟩. ⟨lirmm-01445070⟩
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