Distributed and Dynamic Shared-Buffer Router for High-Performance Interconnect

Charles Effiong; Gilles Sassatelli; Abdoulaye Gamatié

Distributed and Dynamic Shared-Buffer Router for High-Performance Interconnect

Charles Effiong ¹ Gilles Sassatelli ¹ Abdoulaye Gamatié ¹

LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier

Abstract : Most Network-on-Chip routers dedicate a set of buffers to the input and/or output ports. This design decision leads to buffer underutilization especially when running applications with non-uniform traffic patterns. In order to maximize resource usage for performance and energy gains, we present a synchronous and elastic buffer implementation of a router architecture called Roundabout with intrinsic resource sharing. Roundabout is inspired by real-life traffic roundabouts and consists of lanes shared by multiple input and output ports. Roundabout offers performance improvement of 61% for uniform traffic pattern and up to 88% for non-uniform traffic pattern over the Hermes router, a typical input buffered router. In terms of power, it consumes 24% less than the Hermes router. Roundabout provides a highly parametric architecture that can produce different router configurations with varying topological trade-offs for performance gains without sacrificing area.

Document type :

Conference papers

Domain :

Engineering Sciences [physics] / Micro and nanotechnologies/Microelectronics

Complete list of metadatas

https://hal-lirmm.ccsd.cnrs.fr/lirmm-01622889
Contributor : Charles Effiong <>
Submitted on : Tuesday, October 24, 2017 - 5:38:09 PM
Last modification on : Friday, October 19, 2018 - 8:16:01 PM

Distributed and Dynamic Shared-Buffer Router for High-Performance Interconnect

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