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Memory cell with volatile and non-volatile storage

Yoann Guillemenet 1 Lionel Torres 2
2 ADAC - ADAptive Computing
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : The invention concerns a non-volatile memory element comprising: first and second transistors (106, 108) forming an inverter (104) coupled between a first storage node (112) and an output (110) of the memory element; a third transistor (116) coupled between the first storage node (112) and a first supply voltage (GND, VDD) and comprising a control terminal coupled to said output; a first resistance switching element (102) coupled in series with said third transistor and programmed to have one of first and second resistances (Rmin, Rmax) representing a non-volatile data bit; a fourth transistor (118) coupled between said storage node (112) a second supply voltage (VDD, GND); and control circuitry (130) adapted to activate said third transistor at the start of a transfer phase of said non-volatile data bit to said storage node, and to control said fourth transistor to couple said storage node to said second supply voltage during said transfer phase.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01687790
Contributor : Caroline Lebrun <>
Submitted on : Thursday, January 18, 2018 - 5:32:06 PM
Last modification on : Thursday, September 6, 2018 - 1:12:15 AM

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  • HAL Id : lirmm-01687790, version 1

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Yoann Guillemenet, Lionel Torres. Memory cell with volatile and non-volatile storage. United States, Patent n° : US2014269003 (A1). 2014. ⟨lirmm-01687790⟩

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