Formal analysis of bandwidth enhancement for high-performance active-input current mirror

Mohan Julien 1 Serge Bernard 1 Fabien Soulier 1 Vincent Kerzérho 1 Guy Cathébras 1
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : High-performance CMOS current mirrors are used in a large variety of circuit as fundamental elements of analog design. As a consequence, several topologies have been proposed over the years to improve their performances. Among these solutions, the active input is mainly used to improve the speed of high-performance current mirrors. In this paper, we develop a complete formalism to evaluate the potential gain that can be expected using this topology. It allows designers to compute the optimal solution for their current source architecture. Then, comparative case studies are given to demonstrate the efficiency of our formalism to estimate capabilities and limits of the active-input current mirror topology.
Type de document :
Communication dans un congrès
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2017, Palma de Mallorca, Spain. IEEE, 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017, 〈10.1109/DTIS.2017.7930162〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01710201
Contributeur : Vincent Kerzérho <>
Soumis le : jeudi 15 février 2018 - 16:51:45
Dernière modification le : mardi 23 octobre 2018 - 17:10:04

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Mohan Julien, Serge Bernard, Fabien Soulier, Vincent Kerzérho, Guy Cathébras. Formal analysis of bandwidth enhancement for high-performance active-input current mirror. DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2017, Palma de Mallorca, Spain. IEEE, 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017, 〈10.1109/DTIS.2017.7930162〉. 〈lirmm-01710201〉

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