Formal analysis of high-performance stabilized active-input current mirror

Mohan Julien 1 Serge Bernard 1 Fabien Soulier 1 Vincent Kerzérho 1 Guy Cathébras 1
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : The active input topology has been frequently proposed to boost the speed of current mirrors. However, inherent stability issues constrain the maximum reachable speed, sometimes making this solution inefficient. In this paper, we present a modified version of the active-input, which improves the stability region and permits much better speed improvement with low additional complexity and power consumption. Because of the wide range of possible applications, we choose to develop a dedicated formalism based on a systematic and generic approach, intended to achieve the best speed-power performance in stabilized active-input current mirror design. To validate the calculation flow, we compare the simple diode-connected mirror and the stabilized active-input topology with identical MOS devices. An use-case example using our formalism shows that the proposed stabilized active-input current mirror exhibits a speed improvement of more than 30 times the equivalent diode-connected current mirror, with an extra bias current consumed of 5 % of the output DC current.
Type de document :
Communication dans un congrès
ISCAS: International Symposium on Circuits and Systems, May 2017, Baltimore, MD, United States. IEEE, IEEE International Symposium on Circuits and Systems, 2017, 〈10.1109/ISCAS.2017.8051012〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01710205
Contributeur : Vincent Kerzérho <>
Soumis le : jeudi 15 février 2018 - 16:53:27
Dernière modification le : mardi 23 octobre 2018 - 17:10:04

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Mohan Julien, Serge Bernard, Fabien Soulier, Vincent Kerzérho, Guy Cathébras. Formal analysis of high-performance stabilized active-input current mirror. ISCAS: International Symposium on Circuits and Systems, May 2017, Baltimore, MD, United States. IEEE, IEEE International Symposium on Circuits and Systems, 2017, 〈10.1109/ISCAS.2017.8051012〉. 〈lirmm-01710205〉

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