Power-aware voltage tuning for STT-MRAM reliability

Abstract : One of the most promising emerging memory technologies is the Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM), due to its high speed, high endurance, low area, low power consumption, and good scaling capability. In this paper, we estimate the STT-MRAM cell reliability under fabrication- and aging-induced process variability, by evaluating its failure probability. We analyze the effect of control voltage tuning on the fresh and aged cell failure probabilities and, as a result, we propose a power- and aging-aware circuit level variability mitigation technique based on control voltage tuning. We observed that increasing the values of control voltages, the cell failure probability is reduced at different extends (according to the control voltage under variation), but also that the power consumption is increased. As a result, we have identified the control voltage with the highest impact on the fresh cell reliability, and on the endurance of the cell under study. Subsequently, by performing a power/reliability trade-off analysis, the appropriate value of this control voltage is determined.
Document type :
Conference papers
Complete list of metadatas

Cited literature [25 references]  Display  Hide  Download

https://hal-lirmm.ccsd.cnrs.fr/lirmm-01922971
Contributor : Isabelle Gouat <>
Submitted on : Wednesday, November 14, 2018 - 6:55:47 PM
Last modification on : Wednesday, December 19, 2018 - 6:02:05 PM
Long-term archiving on : Friday, February 15, 2019 - 4:32:49 PM

File

ETS.2015.MRAM.pdf
Files produced by the author(s)

Identifiers

Collections

Citation

Elena Ioana Vatajelu, Rosa Rodríguez-Montañés, Stefano Di Carlo, Marco Indaco, Michel Renovell, et al.. Power-aware voltage tuning for STT-MRAM reliability. ETS: European Test Symposium, May 2015, Cluj-Napoca, Romania. ⟨10.1109/ETS.2015.7138748⟩. ⟨lirmm-01922971⟩

Share

Metrics

Record views

141

Files downloads

127