Breaking the speed-power-accuracy trade-off in current mirror with non-linear CCII feedback

Mohan Julien 1 Serge Bernard 1 Fabien Soulier 1 Vincent Kerzérho 1 Guy Cathébras 1
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Design of analog integrated circuit is a matter of trade-offs. Elementary blocks as simple as current mirrors must balance power, speed and accuracy as soon as they have to face dynamic inputs. In this paper, we propose a new structure of high-performance current mirror that overcomes the classical speed-power-accuracy limits. The structure combines a precise cascode current mirror with a custom low-power current conveyor used as a current mode non-linear feedback circuit. It is particularly suitable for fast multipolar current sources with high driving capabilities and small step response time over a large current dynamic. Design method and practical implementation are discussed in details. The circuit realized in AMS CMOS 0.18 μm technology at 1.8 V supply exhibits a large output current dynamic ranging from 160 μA to 2 m A, an average relative current copy error of 0.3% for worst-cases, a maximal settling time of 730 ns for full range step and a maximum quiescent power consumption of 142 μW.
Type de document :
Article dans une revue
Microelectronics Journal, Elsevier, 2019, 83, pp.77-85. 〈10.1016/j.mejo.2018.11.016〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01954318
Contributeur : Guy Cathébras <>
Soumis le : jeudi 13 décembre 2018 - 15:40:58
Dernière modification le : lundi 17 décembre 2018 - 14:26:41

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Mohan Julien, Serge Bernard, Fabien Soulier, Vincent Kerzérho, Guy Cathébras. Breaking the speed-power-accuracy trade-off in current mirror with non-linear CCII feedback. Microelectronics Journal, Elsevier, 2019, 83, pp.77-85. 〈10.1016/j.mejo.2018.11.016〉. 〈lirmm-01954318〉

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