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Conference Papers Year : 2019

A Fault-Tolerant Reconfigurable Platform for Communication Modules of Satellites


This work presents a fault-tolerant reconfigurable hardware platform for the communication module of satellites. A printed circuit board (PCB) was designed following the European Space Agency (ESA) space product standards. It has a layered structure that mitigates the effects of ionizing radiation and electromagnetic interference (EMI) on the signals traveling on board. Also, all components were selected to tolerate wide temperature variation and, when possible, tolerate ionizing radiation. The main feature of the architecture is to allow changing the hardware configuration of the FPGA (Field Programmable Gate Array) containing the telecommand and telemetry unit through remote uplink of its bitstream. In this approach, we consider a microcontroller as the responsible entity for updating the configuration bitstream stored in a non-volatile flash memory. An alternative bitstream is also stored in the memory, as a fail-safe technique. For each of the bitstreams (the main and the alternative), there are three copies stored in memory, and a voting scheme is used to ensure the data integrity, as the flash memory is susceptible to Single Event Effects (SEE). The proposed architecture allows testing all the implementations, exercising their functionalities, and also the modules integration as a payload in the FloripaSat mission.
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lirmm-02008436 , version 1 (29-09-2021)



Cézar Antônio Rigo, Lucas Matana Luza, Elder Dominghini Tramontin, Victor Martins, Sara Vega Martinez, et al.. A Fault-Tolerant Reconfigurable Platform for Communication Modules of Satellites. LATS 2019 - 20th IEEE Latin American Test Symposium, Mar 2019, Santiago, Chile. ⟨10.1109/LATW.2019.8704551⟩. ⟨lirmm-02008436⟩
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