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Physical Design Challenges and Solutions for 3D Stacked and Monolithic 3D Integration

Aida Todri-Sanial 1
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This tutorial aims to provide an in-depth look into process, integration and design methods for 3D ICs. As first, an overview of 3D stacked ICs, and their physical design challenges with respect to conventional 2D circuits will be provided, followed by an in-depth look into the power and thermal integrity challenges and solutions [1-12]. More specifically, design challenges related to power, signal and clock distribution will be covered and also present some of the current solutions. Secondly, an overview of physical design challenges for monolithic 3D integration will be provided, and the differences with respect to 3D stacked ICs. The focus will be on power delivery for monolithic 3D ICs [13-14]. The tutorial will conclude with current challenges and future directions for 3D physical design.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-02487849
Contributor : Aida Todri-Sanial <>
Submitted on : Friday, February 21, 2020 - 8:36:23 PM
Last modification on : Tuesday, March 10, 2020 - 1:36:21 AM

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  • HAL Id : lirmm-02487849, version 1

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Aida Todri-Sanial. Physical Design Challenges and Solutions for 3D Stacked and Monolithic 3D Integration. ASP-DAC, Jan 2020, Beijing, China. ⟨lirmm-02487849⟩

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