This talk aims to give an in-depth look into using carbon nanotubes as back-end-of-line interconnects from process, modeling to physical design. The talk is organized into two parts. The first part provides an in-depth overview of the process and growth of carbon nanotubes and their resistance measurements. In the second part, the talk is dedicated to investigating carbon nanotubes for digital logic cells such as interconnects for signal, power and ground interconnect material. Due to the low-temperature growth, carbon nanotubes inherit a lot of defects that worsen its electrical resistance and ballistics transport. We investigate the doping of CNTs and show both experimental and simulations results of doped CNTs and their improved resistance. We compare the performance, power and area metrics of digital logics cells with conventional copper and carbon nanotube interconnects (undoped and doped) to highlight the advantages and limitations of carbon nanotube BEOL interconnects. Extended references highlighted in this work are listed below.