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Energy-Efficient Machine Learning on FPGA for Edge Devices: a Case Study

Guillaume Devic 1 Gilles Sassatelli 1 Abdoulaye Gamatié 1 
1 ADAC - ADAptive Computing
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This paper presents a case study on the combination of a few static code optimization with an FPGA prototype of heterogeneous multicore architecture to address the energy-efficient execution of machine learning algorithms at the edge computing nodes. Two kinds of optimizations are applied : usual compiler optimizations and real number representations (fixed-point versus floating-point). This study is conducted while accounting for the trade-off between training precision, performance, and energy.
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Contributor : Abdoulaye Gamatié Connect in order to contact the contributor
Submitted on : Friday, December 4, 2020 - 6:38:36 PM
Last modification on : Friday, August 5, 2022 - 3:02:14 PM
Long-term archiving on: : Friday, March 5, 2021 - 7:35:57 PM


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  • HAL Id : lirmm-03041276, version 1


Guillaume Devic, Gilles Sassatelli, Abdoulaye Gamatié. Energy-Efficient Machine Learning on FPGA for Edge Devices: a Case Study. Conférence francophone d'informatique en Parallélisme, Architecture et Système (Compas'2020), Jun 2020, Lyon, France. ⟨lirmm-03041276v1⟩



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