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Finding EM leakages at design stage: a simulation methodology

Davide Poggi 1, 2 Philippe Maurine 1 Thomas Ordas 2 Alexandre Sarafianos 2 Jérémy Raoult 3, 4 
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
4 RADIAC - Radiations et composants
IES - Institut d’Electronique et des Systèmes
Abstract : For many years EM Side-Channel Attacks, which exploit the statistical link between the magnetic field radiated by secure ICs and the data they process, are a critical threat. Indeed, attackers need to find only one hotspot (position of the EM probe over the IC surface) where there is an exploitable leakage to compromise the security. As a result, designing secure ICs robust against these attacks is incredibly difficult because designers must warrant there is no hotspot over the whole IC surface. This task is all the more difficult as there is no CAD tool to compute the magnetic field radiated by ICs and hence no methodology to detect hotspots at the design stages. Within this context, this paper introduces a flow allowing predicting the EM radiations of ICs and two related methodologies. The first one aims at identifying and quantifying the dangerousness of EM hotspots at the surface of ICs, i.e. positions where to place an EM probe to capture a leakage. The second aims at locating leakage hotspots in ICs, i.e. areas in circuits from where these leakages originate.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-03626774
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Submitted on : Thursday, March 31, 2022 - 5:53:23 PM
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  • HAL Id : lirmm-03626774, version 1

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Davide Poggi, Philippe Maurine, Thomas Ordas, Alexandre Sarafianos, Jérémy Raoult. Finding EM leakages at design stage: a simulation methodology. IACR Cryptology ePrint Archive, IACR, 2020, pp.1198. ⟨lirmm-03626774⟩

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