Assessing the Reliability of a Network-on-Chip through Physical Validation - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Poster Year : 2022

Assessing the Reliability of a Network-on-Chip through Physical Validation


With the increased use of embedded computing and the number of cores in integrated systems, communication architectures more robust than the bus became necessary. Networks-on-chip are a solution proposed by academia and industry that makes systems more scalable with increased cores. The increase in cores is also observed in systems for use in critical environments, such as in space applications. However, architectures aimed at these applications suffer from radiation problems and extreme temperatures. Due to the flexibility and availability of logic elements, programmable logic devices are an attractive solution for developing embedded systems for space applications. However, these devices are sensitive to radiation, which makes fault tolerance techniques a requirement for their effective use in space and verification at the physical level since their circuit tends to suffer from radiation effects that cause error propagation. In this context, this work seeks to evaluate the reliability of a Network-on-Chip through physical prototyping tests. The solution employs traffic generators and meters to verify the correct functioning of the network with the complement traffic pattern. Thus, it becomes possible to certify that the behavior of the network in a physical device corresponds to the same presented in a simulation model. The network was first prototyped in the FPGA device Xilinx Zynq-7000 to obtain metrics from the network connected to the traffic components, then it was prototyped at the M2S010 FPGA for testing in a particle accelerator. The results obtained from the particle accelerator tests converge with those obtained in simulation, allowing an initial validation of the network's reliability.
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Dates and versions

lirmm-03834119 , version 1 (28-10-2022)


  • HAL Id : lirmm-03834119 , version 1


Gustavo S. Mafra, Thiago H. Rausch, Douglas Almeida dos Santos, Luigi Dilillo, Eduardo Augusto Bezerra, et al.. Assessing the Reliability of a Network-on-Chip through Physical Validation. LASSS/LACW 2022 - Joint 3rd IAA Latin American Symposium on Small Satellites and 5th IAA Latin American CubeSat Workshop, Nov 2022, Brasilia, Brazil. , 2022. ⟨lirmm-03834119⟩
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