Leveraging Layout-based Effects for Locking Analog ICs - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2022

Leveraging Layout-based Effects for Locking Analog ICs

Abstract

While various obfuscation methods exist in the digital domain, techniques for protecting Intellectual Property (IP) in the analog domain are mostly overlooked. Understandably, analog components have a small footprint as most of the surface of an Integrated Circuit (IC) is digital. Yet, since they are challenging to design and tune, they constitute a valuable IP that ought to be protected. This paper is the first to show a method to secure analog IP by exploiting layout-based effects that are typically seen as undesirable detractors in IC design. Specifically, we make use of the effects of Length of Oxide Diffusion and Well Proximity Effect on transistors for tuning the devices' critical parameters (e.g., gm and Vth). Such parameters are hidden behind key inputs, akin to the logic locking approach for digital ICs. The proposed technique is applied for locking an Operational Transconductance Amplifier. In order to showcase the robustness of the achieved obfuscation, the case studied circuit is simulated for a large number of key sets, i.e., >50K and >300K, and the results show a wide range of degradation in open-loop gain (up to 130dB), phase margin (up to 50 deg), 3dB bandwidth (≈2.5MHz), and power (≈1mW) of the locked circuit when incorrect keys are applied. Our results show the benefit of the technique and the incurred overheads. We also justify the non-effectiveness of reverse engineering efforts for attacking the proposed approach. More importantly, our technique employs only regular transistors and requires neither changes to the IC fabrication process nor any foundry-level coordination or trust.

Dates and versions

lirmm-04080258 , version 1 (24-04-2023)

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Muayad Aljafar, Florence Azaïs, Marie-Lise Flottes, Samuel Pagliarini. Leveraging Layout-based Effects for Locking Analog ICs. ASHES 2022 - 6th Workshop on Attacks and Solutions in Hardware Security @CCS 2022, Nov 2022, Los Angeles, CA, United States. pp.5-13, ⟨10.1145/3560834.3563826⟩. ⟨lirmm-04080258⟩
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