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Conference Papers Year : 2024

Multiple-base Logarithmic Quantization and Application in Reduced Precision AI Computations

Abstract

The power of logarithmic quantizations and computations has been recognized as a useful tool in optimizing the performance of large ML models. In this article, we provide results that demonstrate significantly better quantization signal-to-noise ratio performance thanks to multiple-base logarithmic number systems (MDLNS) in comparison with the floating-point quantizations that use the same number of bits. On a hardware level, we present details about our Xilinx VCU-128 FPGA design for dot product and matrix-vector computations. The MDLNS matrix-vector design significantly outperforms equivalent fixed-point binary designs in terms of area (A) and time (T) complexity and power consumption as evidenced by a 4x scaling of AT2 metric for VLSI performance, and 57% increase in computational throughput per watt compared to fixed-point arithmetic.
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Dates and versions

lirmm-04638183 , version 1 (08-07-2024)

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Vassil Dimitrov, Richard Ford, Laurent Imbert, Arjuna Madanayake, Nilan Udayanga, et al.. Multiple-base Logarithmic Quantization and Application in Reduced Precision AI Computations. ARITH 2024 - 31st IEEE International Symposium on Computer Arithmetic, Jun 2024, Málaga, Spain. pp.48-51, ⟨10.1109/ARITH61463.2024.00017⟩. ⟨lirmm-04638183⟩
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