Embedded Flash Testing: Overview and Perspectives - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2006

Embedded Flash Testing: Overview and Perspectives

Abstract

The evolution of System-on-Chip (SoC) designs involves the development of non-volatile memory technologies like Flash. Embedded flash (eFlash) memories are based on the floating-gate transistor concept and can be subject to complex hard defects creating functional faults. In this paper, we present a complete analysis of a particular failure mechanism, referred as disturb phenomenon. Moreover, we analyze the efficiency of a particular test sequence to detect this disturb phenomenon. Finally we conclude on the interest to develop new test infrastructure well adapted to the eFlash environment
Fichier principal
Vignette du fichier
DTIS06-94.pdf (264.98 Ko) Télécharger le fichier
Loading...

Dates and versions

lirmm-00093665 , version 1 (13-09-2006)

Identifiers

  • HAL Id : lirmm-00093665 , version 1

Cite

Olivier Ginez, Jean-Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, et al.. Embedded Flash Testing: Overview and Perspectives. DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.210-215. ⟨lirmm-00093665⟩
145 View
2056 Download

Share

Gmail Facebook X LinkedIn More