HBM and CDM Stress Evaluation at Circuit Level - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Reports Year : 2006

HBM and CDM Stress Evaluation at Circuit Level

Christine Carvalho De Matos  : Connect in order to contact the contributor

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00102725

Submitted on : Monday, October 2, 2006-3:47:57 PM

Last modification on : Friday, March 24, 2023-2:52:48 PM

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lirmm-00102725 , version 1 (02-10-2006)

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  • HAL Id : lirmm-00102725 , version 1

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Marie Lafont, Florence Azaïs, Pascal Nouet. HBM and CDM Stress Evaluation at Circuit Level. 06023, 2006, 15 p. ⟨lirmm-00102725⟩

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