Resistive-Open Defect Influence in SRAM Pre-Charge Circuits: Analysis and Characterization - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2005

Resistive-Open Defect Influence in SRAM Pre-Charge Circuits: Analysis and Characterization

Abstract

In this paper, we present an exhaustive study on the effects of resistive-open defects in the pre-charge circuits of SRAM memories. In particular, we have analyzed the influence of resistive-opens placed in different locations of these circuits. In SRAM memories, the pre-charge circuits operate the pre-charge and equalization at a certain voltage level, in general Vdd, of all the couples of bit lines of the memory array. This action is essential in order to ensure correct read operations. Each defect studied in this paper disturbs the pre-charge circuit in a different way and for different resistive ranges, but the produced effect on the normal memory action is always the perturbation of the read operations. This faulty behavior can be modeled with un-restored write faults (URWFs) and un-restored read faults (URRFs), because there is an incorrect pre-charge/equalization of the bit lines after a write or read operation that disturbs the following read operation. In the last part of the paper, we demonstrate that the test of URWFs is more rentable in terms of resistive defect detection than that of URRFs.
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Dates and versions

lirmm-00106010 , version 1 (13-10-2006)

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Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan. Resistive-Open Defect Influence in SRAM Pre-Charge Circuits: Analysis and Characterization. ETS: European Test Symposium, May 2005, Tallinn, Estonia. pp.116-121, ⟨10.1109/ETS.2005.33⟩. ⟨lirmm-00106010⟩
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