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Impact of Gate Oxide Reduction Failure on Analog Applications: Example of the Current Mirror

S. Bernardini P. Masson Jean-Michel Portal 1 Jean-Marc J.-M. Galliere 2 Michel Renovell 3 
1 L2MP - Laboratoire matériaux et microélectronique de Provence
2 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
3 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
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Conference papers
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00108659
Contributor : Christine Carvalho De Matos Connect in order to contact the contributor
Submitted on : Monday, October 23, 2006 - 8:52:41 AM
Last modification on : Friday, October 22, 2021 - 3:07:36 PM

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  • HAL Id : lirmm-00108659, version 1

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UNIV-TLN | CNRS | UNIV-AMU | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

Citation

S. Bernardini, P. Masson, Jean-Michel Portal, Jean-Marc J.-M. Galliere, Michel Renovell. Impact of Gate Oxide Reduction Failure on Analog Applications: Example of the Current Mirror. LATW: Latin American Test Workshop, Mar 2004, Cartagena, Spain. pp.12-17. ⟨lirmm-00108659⟩

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