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The Pros and Cons of Very-Low-Voltage Testing: An Analysis Based on Resistive Bridging Faults

P. Engelke I. Polian Michel Renovell 1 B. Seshadri P. Becker 
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
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Conference papers
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00108845
Contributor : Christine Carvalho De Matos Connect in order to contact the contributor
Submitted on : Monday, October 23, 2006 - 12:56:58 PM
Last modification on : Friday, August 5, 2022 - 10:47:53 AM

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  • HAL Id : lirmm-00108845, version 1

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

Citation

P. Engelke, I. Polian, Michel Renovell, B. Seshadri, P. Becker. The Pros and Cons of Very-Low-Voltage Testing: An Analysis Based on Resistive Bridging Faults. VTS'04: 22nd IEEE VLSI Test Symposium, Apr 2004, Napa Valley, CA (USA), pp.171-178. ⟨lirmm-00108845⟩

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