“Analogue Network of Converters”: A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2006

“Analogue Network of Converters”: A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC

Abstract

In this paper, complex mixed signal circuits such as SiP or SOC including several ADCs and DACs are considered. A new DFT technique is proposed allowing the test of this complete set of embedded ADCs and DACs in a fully digital way such that only a simple low cost tester can be used. Moreover, this technique called “Analogue Network of Converters” (ANC) requires an extremely simple additional circuitry and interconnect
Fichier principal
Vignette du fichier
Analog_Network_of_Converters_A_DFT_technique_camera_ready_ETS061.pdf.pdf (299.06 Ko) Télécharger le fichier
Loading...

Dates and versions

lirmm-00115676 , version 1 (22-11-2006)

Identifiers

  • HAL Id : lirmm-00115676 , version 1

Cite

Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Vincent Kerzérho, et al.. “Analogue Network of Converters”: A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC. ETS: European Test Symposium, May 2006, Southampton, United Kingdom. pp.159-164. ⟨lirmm-00115676⟩
106 View
251 Download

Share

Gmail Facebook X LinkedIn More