Automatic Generation of Low-Power Circuits for the Evaluation of Polynomials

Arnaud Tisserand 1
1 ARITH - Arithmétique informatique
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This paper presents a method for the automatic generation of high-performance and low-power arithmetic operators based on polynomial approximations. It deals with the bit-level representation of the polynomial coefficients, the intermediate computations width, the approximation and the rounding errors. The generated operators are small, fast and numerically validated at design time. Some examples have been implemented on FPGAs.
Type de document :
Communication dans un congrès
40th Asilomar Conference on Signals, Systems and Computers, Oct 2006, Pacific Grove, CA (USA), IEEE, pp.2053-2057, 2006, 〈10.1109/ACSSC.2006.355128〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00125519
Contributeur : Arnaud Tisserand <>
Soumis le : mardi 19 juin 2007 - 17:29:51
Dernière modification le : jeudi 24 mai 2018 - 15:59:21
Document(s) archivé(s) le : mardi 6 avril 2010 - 22:20:52

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Arnaud Tisserand. Automatic Generation of Low-Power Circuits for the Evaluation of Polynomials. 40th Asilomar Conference on Signals, Systems and Computers, Oct 2006, Pacific Grove, CA (USA), IEEE, pp.2053-2057, 2006, 〈10.1109/ACSSC.2006.355128〉. 〈lirmm-00125519〉

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