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Conference Papers Year : 2006

Automatic Generation of Low-Power Circuits for the Evaluation of Polynomials

Arnaud Tisserand

Abstract

This paper presents a method for the automatic generation of high-performance and low-power arithmetic operators based on polynomial approximations. It deals with the bit-level representation of the polynomial coefficients, the intermediate computations width, the approximation and the rounding errors. The generated operators are small, fast and numerically validated at design time. Some examples have been implemented on FPGAs.
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Dates and versions

lirmm-00125519 , version 1 (19-06-2007)

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Arnaud Tisserand. Automatic Generation of Low-Power Circuits for the Evaluation of Polynomials. 40th Asilomar Conference on Signals, Systems and Computers, Oct 2006, Pacific Grove, CA (USA), pp.2053-2057, ⟨10.1109/ACSSC.2006.355128⟩. ⟨lirmm-00125519⟩
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