Unified Diagnostic Method Targeting Several Fault Models

Abstract : Fault diagnosis is important in improving the design process and the manufacturing yield of nanometer circuits. It is however a challenging problem as today's complex defects lead to an explosion of the diagnosis solution space with the increasing number of possible fault locations and fault models. Our goal in this study consists in developing a new diagnosis method targeting almost all the nanometer defects in an unified manner (stuck-at, delay, open, stuck-on/open, short, resistive opens or shorts). The context of this study can be either external scan testing or scan-based BIST where time or space compaction is normally applied to test responses. Only logic cores are assumed as circuit under test/diagnosis in this study.
keyword : Diagnostic
Type de document :
Communication dans un congrès
VLSI-SOC'06: 14th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, Oct 2006, Nice, pp.53-55, 2006
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Contributeur : Arnaud Virazel <>
Soumis le : jeudi 15 mars 2007 - 15:40:08
Dernière modification le : jeudi 24 mai 2018 - 15:59:24
Document(s) archivé(s) le : mardi 6 avril 2010 - 21:49:06

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Alexandre Rousset, Patrick Girard, Serge Pravossoudovitch, Christian Landrault, Arnaud Virazel. Unified Diagnostic Method Targeting Several Fault Models. VLSI-SOC'06: 14th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, Oct 2006, Nice, pp.53-55, 2006. 〈lirmm-00136869〉

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