Improving NoC-based Testing Through Compression Schemes

Abstract : The effectiveness of the NoC reuse during test is very dependent on the number of test interfaces with the tester. This paper proposes a test scheduling method based on the use of a compression scheme to increase the number of test interfaces with the tester (thus increasing test parallelism) while still reusing available SoC pins and tester channels. We show that the combined approach allows test time minimization with minimal area overhead for systems with very few test interfaces.
Type de document :
Poster
DATE: Design, Automation and Test in Europe, Apr 2007, Nice, France. 2007, 〈http://www.date-conference.com/conference/2007/prog/〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00170833
Contributeur : Julien Dalmasso <>
Soumis le : lundi 10 septembre 2007 - 16:37:13
Dernière modification le : jeudi 11 janvier 2018 - 06:27:18
Document(s) archivé(s) le : vendredi 9 avril 2010 - 01:51:19

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  • HAL Id : lirmm-00170833, version 1

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Erika Cota, Julien Dalmasso, Marie-Lise Flottes, Bruno Rouzeyre. Improving NoC-based Testing Through Compression Schemes. DATE: Design, Automation and Test in Europe, Apr 2007, Nice, France. 2007, 〈http://www.date-conference.com/conference/2007/prog/〉. 〈lirmm-00170833〉

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