Path Selection Based on Incremental Technique

Abstract : This paper addresses the problem of selecting a set of paths to optimize the performance of a combinational circuit. Comparison between different path enumeration algorithms is presented here considering realistic delay values for the different path elements. Application is given on ISCAS'85 benchmarks where the CPU times of the different investigated algorithms are compared.
Type de document :
Chapitre d'ouvrage
Mixed Design of Integrated Circuits and Systems, Kluwer Academic Publishers, pp.137-142, 1998
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00239354
Contributeur : Nadine Azemard <>
Soumis le : mardi 5 février 2008 - 15:34:39
Dernière modification le : lundi 16 juillet 2018 - 11:08:13

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  • HAL Id : lirmm-00239354, version 1

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Séverine Cremoux, Nadine Azemard, Daniel Auvergne. Path Selection Based on Incremental Technique. Mixed Design of Integrated Circuits and Systems, Kluwer Academic Publishers, pp.137-142, 1998. 〈lirmm-00239354〉

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