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Conference Papers Year : 1998

Path Resizing Based on Incremental Technique

Abstract

Based on an incremental path search algorithm, this paper addresses the problem of longest combinational paths selection for performance optimization at physical level. A realistic evaluation of gate delay and controlled sizing techniques are used to manage the circuit path sizing alternatives, such as delay or power/area constraints. The efficiency of this technique is demonstrated and also illustrated on several ISCAS'85 benchmark circuits. A comparison is given between regular sizing alternatives to local optimization steps controlled by specific indicators.
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lirmm-00241190 , version 1 (06-02-2008)

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Séverine Cremoux, Nadine Azemard, Daniel Auvergne. Path Resizing Based on Incremental Technique. ISCAS: International Symposium on Circuits and Systems, May 1998, Monterey, CA, United States. pp.90-93, ⟨10.1109/ISCAS.1998.705219⟩. ⟨lirmm-00241190⟩
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