AES-based BIST: Self-test, Test Pattern Generation and Signature Analysis

Abstract : Re-using embedded resources for implementing built-in self test mechanisms allows test cost reduction. In this paper we demonstrate how to implement cost-efficient built-in self test functions from the AES cryptoalgorithm hardware implementation in a secure system. Self-test of the proposed implementation is also presented. A statistical test suite and fault-simulation are used for evaluating the efficiency of the corresponding cryptocore as pseudo-random test pattern generator; an analytical approach demonstrates the low probability of aliasing when used for test response compaction.
Type de document :
Communication dans un congrès
DELTA'08: 4th IEEE International Symposium on Electronic Design, Test & Applications, Jan 2008, Hong-Kong, IEEE, pp.314-321, 2008, 〈http://www.ece.ust.hk/delta2008/〉
Liste complète des métadonnées

Littérature citée [11 références]  Voir  Masquer  Télécharger

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00258769
Contributeur : Bruno Rouzeyre <>
Soumis le : lundi 25 février 2008 - 11:59:06
Dernière modification le : jeudi 24 mai 2018 - 15:59:24
Document(s) archivé(s) le : jeudi 20 mai 2010 - 23:30:03

Fichier

Identifiants

  • HAL Id : lirmm-00258769, version 1

Collections

Citation

Marion Doulcier, Marie-Lise Flottes, Bruno Rouzeyre. AES-based BIST: Self-test, Test Pattern Generation and Signature Analysis. DELTA'08: 4th IEEE International Symposium on Electronic Design, Test & Applications, Jan 2008, Hong-Kong, IEEE, pp.314-321, 2008, 〈http://www.ece.ust.hk/delta2008/〉. 〈lirmm-00258769〉

Partager

Métriques

Consultations de la notice

212

Téléchargements de fichiers

410