Skip to Main content Skip to Navigation
Conference papers

AES-based BIST: Self-test, Test Pattern Generation and Signature Analysis

Abstract : Re-using embedded resources for implementing built-in self test mechanisms allows test cost reduction. In this paper we demonstrate how to implement cost-efficient built-in self test functions from the AES cryptoalgorithm hardware implementation in a secure system. Self-test of the proposed implementation is also presented. A statistical test suite and fault-simulation are used for evaluating the efficiency of the corresponding cryptocore as pseudo-random test pattern generator; an analytical approach demonstrates the low probability of aliasing when used for test response compaction.
Complete list of metadatas

Cited literature [11 references]  Display  Hide  Download

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00258769
Contributor : Bruno Rouzeyre <>
Submitted on : Monday, February 25, 2008 - 11:59:06 AM
Last modification on : Tuesday, October 23, 2018 - 10:46:02 AM
Document(s) archivé(s) le : Thursday, May 20, 2010 - 11:30:03 PM

Identifiers

  • HAL Id : lirmm-00258769, version 1

Collections

Citation

Marion Doulcier, Marie-Lise Flottes, Bruno Rouzeyre. AES-based BIST: Self-test, Test Pattern Generation and Signature Analysis. DELTA'08: 4th IEEE International Symposium on Electronic Design, Test & Applications, Jan 2008, Hong-Kong, pp.314-321. ⟨lirmm-00258769⟩

Share

Metrics

Record views

244

Files downloads

590