A Heuristic for Test scheduling at System Level

Abstract : Summary form only given. This paper considers the test-scheduling problem of a SoC. The proposed approach is based on a "sessionless" test scheme. It minimizes the system test time while respecting a power dissipation limit and test resource sharing constraints. Experimental results show that our approach outperforms other related test scheduling solutions.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00268503
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Submitted on : Saturday, January 21, 2017 - 10:18:09 PM
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Marie-Lise Flottes, Julien Pouget, Bruno Rouzeyre. A Heuristic for Test scheduling at System Level. DATE: Design, Automation and Test in Europe, Mar 2002, Paris, France. pp.1124-1124, ⟨10.1109/DATE.2002.998480⟩. ⟨lirmm-00268503⟩

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