Power-Constrained Test Scheduling for SoCs Under a "No Session" Scheme

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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00268504
Contributor : Christine Carvalho de Matos <>
Submitted on : Tuesday, April 1, 2008 - 9:27:34 AM
Last modification on : Tuesday, October 23, 2018 - 10:46:02 AM

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  • HAL Id : lirmm-00268504, version 1

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Marie-Lise Flottes, Jean Pouget, Bruno Rouzeyre. Power-Constrained Test Scheduling for SoCs Under a "No Session" Scheme. SoC Design Methodologies, Montpellier, France, pp.401-412. ⟨lirmm-00268504⟩

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