Initialization of Partially LBISTed Sequential Circuits

Abstract : Full scan is the most widely accepted and used DfT approach for large sequential machines. Nevertheless, in very dedicated cases it cannot be used mainly due to performance reasons as for example in high performance deeply pipelined CPU units. In this case full scan approach has to be replaced by partial scan. When trying to apply LogicBIST on partially scanned machines, the initialization problem of non-scan elements has to be solved. In this paper, we propose a nearly optimal algorithm to obtain a minimum set of memory elements to be initialized enabling to solve this initialization problem.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00269339
Contributor : Christine Carvalho de Matos <>
Submitted on : Saturday, January 21, 2017 - 3:56:19 PM
Last modification on : Thursday, May 24, 2018 - 3:59:25 PM
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  • HAL Id : lirmm-00269339, version 1

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Isabelle Vogel, Marie-Lise Flottes, Christian Landrault. Initialization of Partially LBISTed Sequential Circuits. ETW: European Test Workshop, May 2002, Corfou, Greece. ⟨lirmm-00269339⟩

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