A Case Study on Logic Diagnosis for System-on-Chip

Abstract : This paper presents an industrial case study on logic diagnosis targeting System-on-Chip (SoC). We first show the complexity and the issues related to the diagnosis of SoC. Then we propose a diagnosis approach based on the Effect-Cause paradigm. This approach consists of two phases: (i) a fault localization phase resorting to the critical path tracing to determine a set of suspects, (ii) a fault model allocation phase associating a set of fault models to each suspect identified during the first phase. To deal with SoC we define a new algebra for the critical path tracing process during fault localization. Experimental results show the diagnosis accuracy, in terms of absolute number of suspects, of the proposed approach. Moreover, a comparison with an industrial reference tool highlights the reliability of our approach.
Type de document :
Communication dans un congrès
ISQED'09: IEEE 10th International Symposium on Quality Electronic Design, Mar 2009, San Jose, CA, USA, pp.253-260, 2009, 〈http://www.isqed.org/〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00370646
Contributeur : Alberto Bosio <>
Soumis le : mardi 24 mars 2009 - 17:12:34
Dernière modification le : jeudi 24 mai 2018 - 15:59:24

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  • HAL Id : lirmm-00370646, version 1

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Youssef Benabboud, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, et al.. A Case Study on Logic Diagnosis for System-on-Chip. ISQED'09: IEEE 10th International Symposium on Quality Electronic Design, Mar 2009, San Jose, CA, USA, pp.253-260, 2009, 〈http://www.isqed.org/〉. 〈lirmm-00370646〉

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